The present invention generally relates to semiconductor devices and more particularly to a compound semiconductor device formed on a substrate having an off-angle surface.
Compound semiconductor devices are used extensively for high speed applications due to the small effective mass of electrons in the compound semiconductor materials forming such semiconductor devices.
A compound semiconductor devices is formed on a substrate of a compound semiconductor material such as GaAs or InP, wherein such a compound semiconductor substrate is generally formed to have an off-angle major surface that is inclined with respect to the (100) surface by an angle of typically 1-2.degree.. As a result of the offset, such an inclined surface includes a number of steps each having a (100) surface and a corresponding step edge.
By forming steps with a regular pitch on the surface of the substrate, control of uniform growth of the semiconductor layers on the substrate is substantially facilitated. It should be noted that the growth of semiconductor layers occurs laterally from each step edge along the (100) surface.
On the other hand, such a lateral growth of the semiconductor layers generally includes a fluctuation in the rate of growth, and as a result, there usually occurs a formation of multi-step structure indicated in FIG. 1 at the location where the lateral growth of the crystal surface is impeded.
Referring to FIG. 1, it will be noted that a semiconductor layer 2 grown on an inclined upper major surface of a substrate 1 includes a number of steps 2a-2c each having a step height H and a step width W, wherein the step height H is at least 10.ANG. and includes several or more atomic layers. The inclined surface of the substrate 1, represented in FIG. 1 by a continuous straight line, is actually formed of a number of more smaller steps each having a step height of one or two atomic layers and a much more smaller step width. Thus, it should be noted that the inclined straight line of FIG. 1 does not mean that the surface is formed by a flat crystal surface.
In the stepped structure of FIG. 1, it should be noted that the steps are formed with a generally regular, periodical pitch, with the step width W of typically less than 200 nm. While the multi-step structure is formed as a result of random fluctuation in the growth rate of the semiconductor layers, it is believed that such a regular, periodical step structure develops ultimately as a stable structure.
Referring to FIG. 2 showing a model band structure of the semiconductor layer 2, it will be noted that the appearance the periodical structure as indicated in FIG. 1 causes scattering of carriers having a Fermi energy E.sub.F and corresponding wave number k.sub.F, between the state where the wave number is +k.sub.F and the state where the wave number is -k.sub.F when the pitch and hence the step width W is small enough in correspondence to the wavelength of the electron waves in such a structure. In FIG. 2, Eg represents the bandgap. When such a scattering of carriers occurs in a FET such as HEMT or MESFET, the device performance is deteriorated substantially. This problem of scattering of the carriers by the stepped structure of the semiconductor layers becomes conspicuous particularly in the so-called E-mode FETs where E.sub.F is mall and the electron waves have a wavelength that causes a resonance with the periodical step structure.
Further, it should be noted that such a structure having a multi-step structure is unstable against the process steps applied thereto. For example, an etching step applied to a part of the step may result in a removal of the entire step. Further, existence of such a large step causes a physical scattering of the carriers, which is detrimental to the operation of a FET such as a HEMT.
In order to eliminate such a scattering of the carriers, it is desired to increase the step width W and hence the pitch of the steps as much as possible.
Meanwhile, conventional compound semiconductor devices, whether it may be a FET such as a HEMT or a bipolar device such as a HBT, have suffered from the problem of increased resistance between an active layer such as an electron supplying layer or an emitter layer and a cap layer provided thereon.
FIG. 3 shows a carrier density profile for a heteroepitaxial structure in which an InGaP layer is grown on a GaAs layer. It will be noted that there occurs a remarkable depletion of carriers at the heterojunction interface between GaAs and InGaP designated by an arrow.
Such an increase of the resistance is caused by the depletion of the carriers taking place at such a heterojunction interface, wherein such a depletion of the carriers is caused by the distortion of crystal lattice at such a heterojunction interface. It should be noted that the active layer is typically formed of InGaP while the cap layer is usually formed of GaAs.